cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 1/8 MTP5210F3 cystek product specification p-channel enhancement mode power mosfet MTP5210F3 features ? simple drive requirement ? repetitive avalanche rated ? fast switching characteristic ? pb-free lead plating and rohs compliant package symbol outline MTP5210F3 to-263 g d s bv dss -100v i d -34a v gs =-10v, i d =-20a 37m r dson(typ) v gs =-4.5v, i d =-18a 42m g gate d drain s source absolute maximum ratings (t c =25 c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds -100 gate-source voltage v gs 20 v continuous drain current @ t c =25 c, v gs =-10v i d -34 continuous drain current @ t c =100c, v gs =-10v i d -21 pulsed drain current (note 1) i dm -130 avalanche current i as -20 a avalanche energy @ l=1mh, i d =-20a, r g =25 e as 200 e ar 10 mj repetitive avalanche energy@ l=0.05mh (note 2) t c =25 c 100 power dissipation p d w t c =100 c 40 operating junction and storage temperature tj, tstg -55~+150 c note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1%
cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 2/8 MTP5210F3 cystek product specification thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 1.5 c/w thermal resistance, junction-to-ambient, max r th,j-a 62.5 c/w characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -100 - - v gs =0v, i d =-250 a v gs(th) -1.0 -1.9 -3.0 v v ds = v gs , i d =-250 a g fs - 29 - s v ds =-10v, i d =-20a i gss - - 100 na v gs = 20 - - 1 v ds =-80v, v gs =0v i dss - - 25 a v ds =-70v, v gs =0v, tj=125 c - 37 55 v gs =-10v, i d =-20a *r ds(on) - 42 70 m v gs =-4.5v, i d =-18a dynamic *qg - 148 - *qgs - 26 - *qgd - 80 - nc i d =-34a, v ds =-50v, v gs =-10v *t d(on) - 70 - *tr - 13 - *t d(off) - 240 - *t f - 50 - ns v ds =-20v, i d =-1a, v gs =-10v, r g =6 ciss - 8233 - coss - 234 - crss - 166 - pf v gs =0v, v ds =-25v, f=1mhz source-drain diode *i s - - -34 *i sm - - -130 a *v sd - -0.85 -1.2 v i f =-20a, v gs =0v *trr - 180 - ns *qrr - 1.3 - c i f =-20a, v gs =0, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping MTP5210F3-0-t4-s to-263 (pb-free lead plating and rohs compliant package) 800 pcs / tape & reel
cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 3/8 MTP5210F3 cystek product specification typical characteristics typical output characteristics 0 20 40 60 80 100 120 024681 0 brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v 10v,9v,8v,7v,6v,5v -v ds , drain-source voltage(v) -i d , drain current (a) 4v -v gs =3v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =-4.5v v gs =-3v v gs =-10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 40 80 120 160 200 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-10v, i d =-20a r ds( on) @tj=25c : 36.6 m -v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =-20a
cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 4/8 MTP5210F3 cystek product specification typical characteristics (cont.) capacitance vs drain-to-source voltage 100 1000 10000 100000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs(th) , normalized threshold voltage i d =-250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =-10v gate charge characteristics 0 2 4 6 8 10 0 40 80 120 160 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-34a v ds =-80v v ds =-50v maximum safe operating area 0.01 0.1 1 10 100 1000 0.1 1 10 100 1000 -v ds , drain-source voltage(v) -i d , drain current(a) t c =25c, tj=150c v gs =-10v, jc =1.5c/w single pulse dc 100ms r dson limited 1s 100 s 1ms 10ms maximum drain current vs case temperature 0 5 10 15 20 25 30 35 40 25 50 75 100 125 150 175 200 t c , case temperature(c) -i d , maximum drain current(a) v gs =-10v, r jc =1.5c/w
cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 5/8 MTP5210F3 cystek product specification typical characteristics (cont.) typical transfer characteristics 0 20 40 60 80 100 120 140 0246810 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-10v power derating curve 0 20 40 60 80 100 120 0 25 50 75 100 125 150 175 200 t c , case temperature() p d , power dissipation(w) transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =1.5c/w
cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 6/8 MTP5210F3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 7/8 MTP5210F3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c563f3 issued date : 2012.12.25 revised date : page no. : 8/8 MTP5210F3 cystek product specification to-263 dimension *:typical inches millimeters style : pin 1.gate 2.drain 3.source 3-lead plastic surface mounted package cystek package code : f3 marking : 5210 device name date code inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.3800 0.4050 9.65 10.29 i 0.0500 0.0700 1.27 1.78 b 0.3300 0.3700 8.38 9.40 j - *0.1000 - *2.54 c - 0.0550 - 1.40 k 0.0450 0.0550 1.14 1.40 d 0.5750 0.6250 14.61 15.88 l 0.0200 0.0390 0.51 0.99 e 0.1600 0.1900 4.06 4.83 1 - - 6 8 f 0.0450 0.0550 1.14 1.40 2 - - 6 8 g 0.0900 0.1100 2.29 2.79 3 - - 0 5 h 0.0180 0.0290 0.46 0.74 notes : 1.controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . a b c d 123 k l j g h e f 2 1 2 3 i
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